The need to remain competitive in cost and performance in the production of semiconductor devices has caused a continuous increase in device density of integrated circuits. To accomplish higher integration and miniaturization in a semiconductor integrated circuit, miniaturization of a circuit pattern formed on a semiconductor wafer must also be accomplished.
Design rules define the space tolerance between devices or interconnect lines so as to ensure that the devices or lines do not interact with one another in any unwanted manner. One important layout design rule that tends to determine the overall size and density of the semiconductor device is a critical dimension (CD). A critical dimension of a circuit is defined as the smallest width of a line or the smallest space between two lines. Another critical design rule is minimum pitch, which is defined as the minimum width of a given feature plus the distance to the adjacent feature edge.
Photolithography is a standard technique utilized to manufacture semiconductor wafers by transferring geometric shapes and patterns on a mask to the surface of a semiconductor wafer. The basic photolithographic process includes projecting a patterned light source onto a layer of radiation-sensitive material, such as a photoresist layer, which is then followed by a development step.
To create finely detailed patterns with small critical dimensions and pitch requires projecting a clearly imaged light pattern. But the ability to project a clear image of a small feature onto the semiconductor wafer is limited by the wavelength of the light that is used, and the ability of a reduction lens system to capture enough diffraction orders from the illuminated mask. Current state-of-the-art photolithography tools use deep ultraviolet (DUV) light with wavelengths of 248 or 193 nm, which allow minimum feature sizes down to about 50 nm.
The minimum feature size that a projection system can print is given approximately by:CD=k1·λ/NA where CD is the minimum feature size or the critical dimension; k1 is a coefficient that encapsulates process-related factors, and typically equals 0.4 for production; λ is the wavelength of light used; and NA is the numerical aperture of the lens, as seen from the semiconductor wafer. According to this equation, minimum feature sizes can be decreased by decreasing the wavelength and/or by increasing the numerical aperture to achieve a tighter focused beam and a smaller spot size.
A photolithographic process utilizes an exposure tool to irradiate the layer of radiation-sensitive material on a wafer through a mask to transfer the pattern on the mask to the wafer. As the critical dimensions of the pattern layout approach the resolution limit of the lithography equipment, optical proximity effects (OPE) begin to influence the manner in which features on a mask transfer to the layer of radiation-sensitive material such that the mask and actual layout patterns begin to differ. Optical proximity effects are known to result from optical diffraction in the projection system. The diffraction causes adjacent features to interact with one another in such a way as to produce pattern-dependent variations; the closer together features are, the more proximity effect is seen. Thus, the ability to locate line patterns close together encroaches on optical parameter limitations.
Accordingly, new and improved methods for patterning semiconductor devices are therefore needed, so as to accomplish the continued miniaturization of a circuit pattern formed on a semiconductor wafer.